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r_type remake

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This commit is contained in:
inixyz
2023-10-15 17:53:31 +03:00
parent 2955f96446
commit d6cfb6d524
1 changed files with 17 additions and 20 deletions
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37
src/tinyriscv.h
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@@ -105,29 +105,26 @@ void trv_I_type(const u8 func3, const u8 func7, u32 regs[32], const u8 rd,
} }
} }
void trv_R_type(const u8 func3, const u8 func7, u32 regs[32], const u8 rd, void tinyriscv_R_type(const u8 func3, const u8 func7, u32 x[32], const u8 rd,
const u8 rs1, const u8 rs2){ const u8 rs1, const u8 rs2){
#define ADD (x[rd] = x[rs1] + x[rs2])
#define SUB (x[rd] = x[rs1] - x[rs2])
#define SLL (x[rd] = x[rs1] << (x[rs2] & 0x1f))
#define SLT (x[rd] = (i32)x[rs1] < (i32)x[rs2])
#define SLTU (x[rd] = x[rs1] < x[rs2])
#define XOR (x[rd] = x[rs1] ^ x[rs2])
#define SRL (x[rd] = x[rs1] >> (x[rs2] & 0x1f))
#define SRA (x[rd] = (i32)x[rs1] >> (x[rs2] & 0x1f))
#define OR (x[rd] = x[rs1] | x[rs2])
#define AND (x[rd] = x[rs1] & x[rs2])
switch(func3){ switch(func3){
case /*ADD/SUB*/ 0x0: case 0: func7 ? SUB : ADD; break;
if(func7 == /*ADD*/ 0x00) regs[rd] = regs[rs1] + regs[rs2]; case 1: SLL; break; case 2: SLT; break;
else if(func7 == /*SUB*/ 0x20) regs[rd] = regs[rs1] - regs[rs2]; case 3: SLTU; break; case 4: XOR; break;
break; case 5: func7 ? SRA : SRL; break;
case 6: OR; break; case 7: AND; break;
case /*SLL*/ 0x1: regs[rd] = regs[rs1] << (regs[rs2] & 0x1f); break;
case /*SLT*/ 0x2: regs[rd] = (i32)regs[rs1] < (i32)regs[rs2]; break;
case /*SLTU*/ 0x3: regs[rd] = regs[rs1] < regs[rs2]; break;
case /*XOR*/ 0x4: regs[rd] = regs[rs1] ^ regs[rs2]; break;
case /*SRL/SRA*/ 0x5:
if(func7 == /*SRL*/ 0x00) regs[rd] = regs[rs1] >> (regs[rs2] & 0x1f);
else if(func7 == /*SRA*/ 0x20){
regs[rd] = (i32)regs[rs1] >> (regs[rs2] & 0x1f);
}
break;
case /*OR*/ 0x6: regs[rd] = regs[rs1] | regs[rs2]; break;
case /*AND*/ 0x7: regs[rd] = regs[rs1] & regs[rs2]; break;
} }
} }