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cleanup

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inixyz
2023-10-10 23:02:00 +03:00
parent 3d9d3efa1c
commit 6b45bcbf42
1 changed files with 65 additions and 94 deletions
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145
main.c
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@@ -1,107 +1,81 @@
#include <stdint.h> #include <stdint.h>
#include <stdio.h>
#include <stdlib.h> typedef uint8_t u8;
typedef uint16_t u16;
typedef uint32_t u32;
typedef int8_t i8;
typedef int16_t i16;
typedef int32_t i32;
typedef struct{ typedef struct{
uint32_t regs[32], pc; u32 regs[32], pc;
uint8_t* mem; u8* mem;
}Cpu; }Cpu;
const uint32_t MEM_OFFSET = 0x80000000; const u32 MEM_OFFSET = 0x80000000;
static inline uint8_t load8(const uint8_t* mem, const uint32_t addr){ static inline u8 load8(const u8* mem, const u32 addr){
return mem[addr - MEM_OFFSET]; return mem[addr - MEM_OFFSET];
} }
static inline uint16_t load16(const uint8_t* mem, const uint32_t addr){ static inline u16 load16(const u8* mem, const u32 addr){
return *(uint16_t*)(mem + addr - MEM_OFFSET); return *(u16*)(mem + addr - MEM_OFFSET);
} }
static inline uint32_t load32(const uint8_t* mem, const uint32_t addr){ static inline u32 load32(const u8* mem, const u32 addr){
return *(uint32_t*)(mem + addr - MEM_OFFSET); return *(u32*)(mem + addr - MEM_OFFSET);
} }
static inline void store8(uint8_t* mem, const uint32_t addr, const uint8_t val){ static inline void store8(u8* mem, const u32 addr, const u8 val){
mem[addr - MEM_OFFSET] = val; mem[addr - MEM_OFFSET] = val;
} }
static inline void store16(uint8_t* mem, const uint32_t addr, static inline void store16(u8* mem, const u32 addr, const u16 val){
const uint16_t val){ *(u16*)(mem + addr - MEM_OFFSET) = val;
*(uint16_t*)(mem + addr - MEM_OFFSET) = val;
} }
static inline void store32(uint8_t* mem, const uint32_t addr, static inline void store32(u8* mem, const u32 addr, const u32 val){
const uint32_t val){ *(u32*)(mem + addr - MEM_OFFSET) = val;
*(uint32_t*)(mem + addr - MEM_OFFSET) = val;
} }
void jump(uint32_t* pc, const uint32_t addr){ void B_type(u32* pc, const u8 func3, const u32 regs[32], const u8 rs1,
if(addr % 4 != 0){ const u8 rs2, const i16 imm){
fprintf(stderr, "EXCEPTION: instruction-address-misaligned\n");
exit(1);
}
*pc = addr;
}
void B_type(uint32_t* pc, const uint8_t func3, const uint32_t regs[32],
const uint8_t rs1, const uint8_t rs2, const int16_t imm){
*pc -= 4;
switch(func3){ switch(func3){
case /*BEQ*/ 0x0: case /*BEQ*/ 0x0: if(regs[rs1] == regs[rs2]) *pc += (i32)imm - 4; break;
if(regs[rs1] == regs[rs2]) jump(pc, *pc + (int32_t)imm); case /*BNE*/ 0x1: if(regs[rs1] != regs[rs2]) *pc += (i32)imm - 4; break;
break;
case /*BNE*/ 0x1:
if(regs[rs1] != regs[rs2]) jump(pc, *pc + (int32_t)imm);
break;
case /*BLT*/ 0x4: case /*BLT*/ 0x4:
if((int32_t)regs[rs1] < (int32_t)regs[rs2]){ if((i32)regs[rs1] < (i32)regs[rs2]) *pc += (i32)imm - 4;
jump(pc, *pc + (int32_t)imm);
}
break; break;
case /*BGE*/ 0x5: case /*BGE*/ 0x5:
if((int32_t)regs[rs1] >= (int32_t)regs[rs2]){ if((i32)regs[rs1] >= (i32)regs[rs2]) *pc += (i32)imm - 4;
jump(pc, *pc + (int32_t)imm);
}
break; break;
case /*BLTU*/ 0x6: case /*BLTU*/ 0x6: if(regs[rs1] < regs[rs2]) *pc += (i32)imm - 4; break;
if(regs[rs1] < regs[rs2]) jump(pc, *pc + (int32_t)imm); case /*BGEU*/ 0x7: if(regs[rs1] >= regs[rs2]) *pc += (i32)imm - 4; break;
break;
case /*BGEU*/ 0x7: if(regs[rs1] >= regs[rs2])
jump(pc, *pc + (int32_t)imm);
break;
default: *pc += 4; break;
} }
} }
void L_type(const uint8_t* mem, const uint8_t func3, uint32_t regs[32], void L_type(const u8* mem, const u8 func3, u32 regs[32], const u8 rd,
const uint8_t rd, const uint8_t rs1, const int16_t imm){ const u8 rs1, const i16 imm){
const uint32_t addr = regs[rs1] + (int32_t)imm; const u32 addr = regs[rs1] + (i32)imm;
switch(func3){ switch(func3){
case /*LB*/ 0x0: regs[rd] = (int32_t)(int8_t)load8(mem, addr); break; case /*LB*/ 0x0: regs[rd] = (i32)(i8)load8(mem, addr); break;
case /*LH*/ 0x1: regs[rd] = (int32_t)(int16_t)load16(mem, addr); break; case /*LH*/ 0x1: regs[rd] = (i32)(i16)load16(mem, addr); break;
case /*LW*/ 0x2: regs[rd] = load32(mem, addr); break; case /*LW*/ 0x2: regs[rd] = load32(mem, addr); break;
case /*LBU*/ 0x4: regs[rd] = load8(mem, addr); break; case /*LBU*/ 0x4: regs[rd] = load8(mem, addr); break;
case /*LHU*/ 0x5: regs[rd] = load16(mem, addr); break; case /*LHU*/ 0x5: regs[rd] = load16(mem, addr); break;
} }
} }
void S_type(uint8_t* mem, const uint8_t func3, const uint32_t regs[32], void S_type(u8* mem, const u8 func3, const u32 regs[32], const u8 rs1,
const uint8_t rs1, const uint8_t rs2, const int16_t imm){ const u8 rs2, const i16 imm){
const uint32_t addr = regs[rs1] + (int32_t)imm; const u32 addr = regs[rs1] + (i32)imm;
switch(func3){ switch(func3){
case /*SB*/ 0x0: store8(mem, addr, regs[rs2]); break; case /*SB*/ 0x0: store8(mem, addr, regs[rs2]); break;
@@ -110,26 +84,26 @@ void S_type(uint8_t* mem, const uint8_t func3, const uint32_t regs[32],
} }
} }
void I_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32], void I_type(const u8 func3, const u8 func7, u32 regs[32], const u8 rd,
const uint8_t rd, const uint8_t rs1, const uint8_t rs2, const int16_t imm){ const u8 rs1, const u8 rs2, const i16 imm){
switch(func3){ switch(func3){
case /*ADDI*/ 0x0: regs[rd] = regs[rs1] + (int32_t)imm; break; case /*ADDI*/ 0x0: regs[rd] = regs[rs1] + (i32)imm; break;
case /*SLTI*/ 0x2: regs[rd] = (int32_t)regs[rs1] < (int32_t)imm; break; case /*SLTI*/ 0x2: regs[rd] = (i32)regs[rs1] < (i32)imm; break;
case /*SLTIU*/ 0x3: regs[rd] = regs[rs1] < (uint32_t)(int32_t)imm; break; case /*SLTIU*/ 0x3: regs[rd] = regs[rs1] < (u32)(i32)imm; break;
case /*XORI*/ 0x4: regs[rd] = regs[rs1] ^ (int32_t)imm; break; case /*XORI*/ 0x4: regs[rd] = regs[rs1] ^ (i32)imm; break;
case /*ORI*/ 0x6: regs[rd] = regs[rs1] | (int32_t)imm; break; case /*ORI*/ 0x6: regs[rd] = regs[rs1] | (i32)imm; break;
case /*ANDI*/ 0x7: regs[rd] = regs[rs1] & (int32_t)imm; break; case /*ANDI*/ 0x7: regs[rd] = regs[rs1] & (i32)imm; break;
case /*SLLI*/ 0x1: regs[rd] = regs[rs1] << rs2; break; case /*SLLI*/ 0x1: regs[rd] = regs[rs1] << rs2; break;
case /*SRLI/SRAI*/ 0x5: case /*SRLI/SRAI*/ 0x5:
if(func7 == /*SRLI*/ 0x00) regs[rd] = regs[rs1] >> rs2; if(func7 == /*SRLI*/ 0x00) regs[rd] = regs[rs1] >> rs2;
else if(func7 == /*SRAI*/ 0x20) regs[rd] = (int32_t)regs[rs1] >> rs2; else if(func7 == /*SRAI*/ 0x20) regs[rd] = (i32)regs[rs1] >> rs2;
break; break;
} }
} }
void R_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32], void R_type(const u8 func3, const u8 func7, u32 regs[32], const u8 rd,
const uint8_t rd, const uint8_t rs1, const uint8_t rs2){ const u8 rs1, const u8 rs2){
switch(func3){ switch(func3){
case /*ADD/SUB*/ 0x0: case /*ADD/SUB*/ 0x0:
@@ -138,14 +112,14 @@ void R_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32],
break; break;
case /*SLL*/ 0x1: regs[rd] = regs[rs1] << (regs[rs2] & 0x1f); break; case /*SLL*/ 0x1: regs[rd] = regs[rs1] << (regs[rs2] & 0x1f); break;
case /*SLT*/ 0x2: regs[rd] = (int32_t)regs[rs1] < (int32_t)regs[rs2]; break; case /*SLT*/ 0x2: regs[rd] = (i32)regs[rs1] < (i32)regs[rs2]; break;
case /*SLTU*/ 0x3: regs[rd] = regs[rs1] < regs[rs2]; break; case /*SLTU*/ 0x3: regs[rd] = regs[rs1] < regs[rs2]; break;
case /*XOR*/ 0x4: regs[rd] = regs[rs1] ^ regs[rs2]; break; case /*XOR*/ 0x4: regs[rd] = regs[rs1] ^ regs[rs2]; break;
case /*SRL/SRA*/ 0x5: case /*SRL/SRA*/ 0x5:
if(func7 == /*SRL*/ 0x00) regs[rd] = regs[rs1] >> (regs[rs2] & 0x1f); if(func7 == /*SRL*/ 0x00) regs[rd] = regs[rs1] >> (regs[rs2] & 0x1f);
else if(func7 == /*SRA*/ 0x20){ else if(func7 == /*SRA*/ 0x20){
regs[rd] = (int32_t)regs[rs1] >> (regs[rs2] & 0x1f); regs[rd] = (i32)regs[rs1] >> (regs[rs2] & 0x1f);
} }
break; break;
@@ -156,7 +130,7 @@ void R_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32],
void step(Cpu* cpu){ void step(Cpu* cpu){
//fetch //fetch
const uint32_t inst = load32(cpu->mem, cpu->pc); const u32 inst = load32(cpu->mem, cpu->pc);
cpu->pc += 4; cpu->pc += 4;
//decode //decode
@@ -166,13 +140,13 @@ void step(Cpu* cpu){
#define rd (inst >> 7 & 0x1f) #define rd (inst >> 7 & 0x1f)
#define rs1 (inst >> 15 & 0x1f) #define rs1 (inst >> 15 & 0x1f)
#define rs2 (inst >> 20 & 0x1f) #define rs2 (inst >> 20 & 0x1f)
#define imm_I ((int32_t)inst >> 20) #define imm_I ((i32)inst >> 20)
#define imm_S (imm_I & 0xffffffe0 | rd) #define imm_S (imm_I & 0xffffffe0 | rd)
#define imm_B (((int32_t)(inst & 0x80000000) >> 19) | \ #define imm_B (((i32)(inst & 0x80000000) >> 19) | \
((inst & 0x80) << 4) | (inst >> 20 & 0x7e0) | (inst >> 7 & 0x1e)) ((inst & 0x80) << 4) | (inst >> 20 & 0x7e0) | (inst >> 7 & 0x1e))
#define imm_J (((int32_t)(inst & 0x80000000) >> 11) | (inst & 0xff000) | \ #define imm_J (((i32)(inst & 0x80000000) >> 11) | (inst & 0xff000) | \
(inst >> 9 & 0x800) | (inst >> 20 & 0x7fe)) (inst >> 9 & 0x800) | (inst >> 20 & 0x7fe))
//execute //execute
@@ -181,14 +155,11 @@ void step(Cpu* cpu){
switch(opcode){ switch(opcode){
case /*LUI*/ 0x37: cpu->regs[rd] = inst & 0xfffff000; break; case /*LUI*/ 0x37: cpu->regs[rd] = inst & 0xfffff000; break;
case /*AUIPC*/ 0x17: cpu->regs[rd] = cpu->pc + (inst & 0xfffff000); break; case /*AUIPC*/ 0x17: cpu->regs[rd] = cpu->pc + (inst & 0xfffff000); break;
case /*JAL*/ 0x6f: case /*JAL*/ 0x6f: cpu->regs[rd] = cpu->pc; cpu->pc += imm_J - 4; break;
cpu->regs[rd] = cpu->pc; jump(&cpu->pc, cpu->pc + imm_J - 4);
break;
case /*JALR*/ 0x67: case /*JALR*/ 0x67:
const uint32_t pc_copy = cpu->pc; const u32 last_pc = cpu->pc;
jump(&cpu->pc, (cpu->regs[rs1] + (int32_t)imm_I) & 0xfffffffe); cpu->pc = (cpu->regs[rs1] + (i32)imm_I) & 0xfffffffe;
cpu->regs[rd] = pc_copy; cpu->regs[rd] = last_pc;
break; break;
case 0x63: B_type(&cpu->pc, func3, cpu->regs, rs1, rs2, imm_B); break; case 0x63: B_type(&cpu->pc, func3, cpu->regs, rs1, rs2, imm_B); break;