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B_type instructions

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This commit is contained in:
inixyz
2023-10-08 19:44:02 +03:00
parent 3a1c9cd7cb
commit 505e51a75e
1 changed files with 69 additions and 46 deletions
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115
main.c
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@@ -35,6 +35,72 @@ static inline void store32(uint8_t* mem, const uint32_t addr,
*(uint32_t*)(mem + addr - MEM_OFFSET) = val; *(uint32_t*)(mem + addr - MEM_OFFSET) = val;
} }
void B_type(uint32_t* pc, const uint8_t func3, const uint32_t regs[32],
const uint8_t rs1, const uint8_t rs2, const int16_t imm){
*pc -= 4;
switch(func3){
case /*BEQ*/ 0x0: if(regs[rs1] == regs[rs2]) *pc += (int32_t)imm; break;
case /*BNE*/ 0x1: if(regs[rs1] != regs[rs2]) *pc += (int32_t)imm; break;
case /*BLT*/ 0x4:
if((int32_t)regs[rs1] < (int32_t)regs[rs2]) *pc += (int32_t)imm;
break;
case /*BGE*/ 0x5:
if((int32_t)regs[rs1] >= (int32_t)regs[rs2]) *pc += (int32_t)imm;
break;
case /*BLTU*/ 0x6: if(regs[rs1] < regs[rs2]) *pc += (int32_t)imm; break;
case /*BGEU*/ 0x7: if(regs[rs1] >= regs[rs2]) *pc += (int32_t)imm; break;
default: *pc += 4; break;
}
}
void L_type(const uint8_t* mem, const uint8_t func3, uint32_t regs[32],
const uint8_t rd, const uint8_t rs1, const int16_t imm){
const uint32_t addr = regs[rs1] + (int32_t)imm;
switch(func3){
case /*LB*/ 0x0: regs[rd] = (int32_t)(int8_t)load8(mem, addr); break;
case /*LH*/ 0x1: regs[rd] = (int32_t)(int16_t)load16(mem, addr); break;
case /*LW*/ 0x2: regs[rd] = load32(mem, addr); break;
case /*LBU*/ 0x4: regs[rd] = load8(mem, addr); break;
case /*LHU*/ 0x5: regs[rd] = load16(mem, addr); break;
}
}
void S_type(uint8_t* mem, const uint8_t func3, const uint32_t regs[32],
const uint8_t rs1, const uint8_t rs2, const int16_t imm){
const uint32_t addr = regs[rs1] + (int32_t)imm;
switch(func3){
case /*SB*/ 0x0: store8(mem, addr, regs[rs2]); break;
case /*SH*/ 0x1: store16(mem, addr, regs[rs2]); break;
case /*SW*/ 0x2: store32(mem, addr, regs[rs2]); break;
}
}
void I_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32],
const uint8_t rd, const uint8_t rs1, const uint8_t rs2, const int16_t imm){
switch(func3){
case /*ADDI*/ 0x0: regs[rd] = regs[rs1] + (int32_t)imm; break;
case /*SLTI*/ 0x2: regs[rd] = (int32_t)regs[rs1] < (int32_t)imm; break;
case /*SLTIU*/ 0x3: regs[rd] = regs[rs1] < (uint32_t)(int32_t)imm; break;
case /*XORI*/ 0x4: regs[rd] = regs[rs1] ^ (int32_t)imm; break;
case /*ORI*/ 0x6: regs[rd] = regs[rs1] | (int32_t)imm; break;
case /*ANDI*/ 0x7: regs[rd] = regs[rs1] & (int32_t)imm; break;
case /*SLLI*/ 0x1: regs[rd] = regs[rs1] << rs2; break;
case /*SRLI/SRAI*/ 0x5:
if(func7 == /*SRLI*/ 0x00) regs[rd] = regs[rs1] >> rs2;
else if(func7 == /*SRAI*/ 0x20) regs[rd] = (int32_t)regs[rs1] >> rs2;
break;
}
}
void R_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32], void R_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32],
const uint8_t rd, const uint8_t rs1, const uint8_t rs2){ const uint8_t rd, const uint8_t rs1, const uint8_t rs2){
@@ -61,52 +127,6 @@ void R_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32],
} }
} }
void L_type(const uint8_t* mem, const uint8_t func3, uint32_t regs[32],
const uint8_t rd, const uint8_t rs1, const int16_t imm){
switch(func3){
case /*LB*/ 0x0:
regs[rd] = (int32_t)(int8_t)load8(mem, regs[rs1] + (int32_t)imm);
break;
case /*LH*/ 0x1:
regs[rd] = (int32_t)(int16_t)load16(mem, regs[rs1] + (int32_t)imm);
break;
case /*LW*/ 0x2: regs[rd] = load32(mem, regs[rs1] + (int32_t)imm); break;
case /*LBU*/ 0x4: load8(mem, regs[rs1] + (int32_t)imm); break;
case /*LHU*/ 0x5: load16(mem, regs[rs1] + (int32_t)imm); break;
}
}
void S_type(uint8_t* mem, const uint8_t func3, const uint32_t regs[32],
const uint8_t rs1, const uint8_t rs2, const int16_t imm){
switch(func3){
case /*SB*/ 0x0: store8(mem, regs[rs1] + (int32_t)imm, regs[rs2]); break;
case /*SH*/ 0x1: store16(mem, regs[rs1] + (int32_t)imm, regs[rs2]); break;
case /*SW*/ 0x2: store32(mem, regs[rs1] + (int32_t)imm, regs[rs2]); break;
}
}
void I_type(const uint8_t func3, const uint8_t func7, uint32_t regs[32],
const uint8_t rd, const uint8_t rs1, const uint8_t rs2, const int16_t imm){
switch(func3){
case /*ADDI*/ 0x0: regs[rd] = regs[rs1] + (int32_t)imm; break;
case /*SLTI*/ 0x2: regs[rd] = (int32_t)regs[rs1] < (int32_t)imm; break;
case /*SLTIU*/ 0x3: regs[rd] = regs[rs1] < (uint32_t)(int32_t)imm; break;
case /*XORI*/ 0x4: regs[rd] = regs[rs1] ^ (int32_t)imm; break;
case /*ORI*/ 0x6: regs[rd] = regs[rs1] | (int32_t)imm; break;
case /*ANDI*/ 0x7: regs[rd] = regs[rs1] & (int32_t)imm; break;
case /*SLLI*/ 0x1: regs[rd] = regs[rs1] << rs2; break;
case /*SRLI/SRAI*/ 0x5:
if(func7 == /*SRLI*/ 0x00) regs[rd] = regs[rs1] >> rs2;
else if(func7 == /*SRAI*/ 0x20) regs[rd] = (int32_t)regs[rs1] >> rs2;
break;
}
}
void step(Cpu* cpu){ void step(Cpu* cpu){
//fetch //fetch
const uint32_t inst = load32(cpu->mem, cpu->pc); const uint32_t inst = load32(cpu->mem, cpu->pc);
@@ -121,11 +141,14 @@ void step(Cpu* cpu){
#define rs2 (inst >> 20 & 0x1f) #define rs2 (inst >> 20 & 0x1f)
#define imm_I ((int32_t)inst >> 20) #define imm_I ((int32_t)inst >> 20)
#define imm_S (imm_I & 0xffffffe0 | rd) #define imm_S (imm_I & 0xffffffe0 | rd)
#define imm_B ((int32_t)inst >> 31 << 12 | (inst & 0x80 << 4) | \
(inst >> 20 & 0x7e0) | (inst >> 7 & 0x1e))
//execute //execute
cpu->regs[0] = 0; cpu->regs[0] = 0;
switch(opcode){ switch(opcode){
case 0x63: B_type(&cpu->pc, func3, cpu->regs, rs1, rs2, imm_B); break;
case 0x03: L_type(cpu->mem, func3, cpu->regs, rd, rs1, imm_I); break; case 0x03: L_type(cpu->mem, func3, cpu->regs, rd, rs1, imm_I); break;
case 0x23: S_type(cpu->mem, func3, cpu->regs, rs1, rs2, imm_S); break; case 0x23: S_type(cpu->mem, func3, cpu->regs, rs1, rs2, imm_S); break;
case 0x13: I_type(func3, func7, cpu->regs, rd, rs1, rs2, imm_I); break; case 0x13: I_type(func3, func7, cpu->regs, rd, rs1, rs2, imm_I); break;