diff --git a/src/main.c b/src/main.c
index 822b09b..c99887e 100644
--- a/src/main.c
+++ b/src/main.c
@@ -42,7 +42,7 @@ void regdump(const trv_cpu* cpu){
 		case 24: printf("s8   "); break; case 25: printf("s9   "); break;
 		case 26: printf("s10  "); break; case 27: printf("s11  "); break;
 		case 28: printf("t3   "); break; case 29: printf("t4   "); break;
-		case 30: printf("t5   "); break; case 31: printf("t5   "); break;
+		case 30: printf("t5   "); break; case 31: printf("t6   "); break;
 		}
 
 		printf(" ");
diff --git a/src/tinyriscv.h b/src/tinyriscv.h
index d603509..ad81d0e 100644
--- a/src/tinyriscv.h
+++ b/src/tinyriscv.h
@@ -12,100 +12,100 @@ typedef int16_t i16;
 typedef int32_t i32;
 
 typedef struct{
-	u32 regs[32], pc, mem_size;
+	u32 x[32], pc, mem_size;
 	u8* mem;
-}trv_cpu;
+}tinyriscv_hart;
 
-const u32 trv_MEM_OFFSET = 0x80000000;
+const u32 tinyriscv_MEM_OFFSET = 0x80000000;
 
 static inline u8 load8(const u8* mem, const u32 addr){
-	return mem[addr - trv_MEM_OFFSET];
+	return mem[addr - tinyriscv_MEM_OFFSET];
 }
 
 static inline u16 load16(const u8* mem, const u32 addr){
-	return *(u16*)(mem + addr - trv_MEM_OFFSET);
+	return *(u16*)(mem + addr - tinyriscv_MEM_OFFSET);
 }
 
 static inline u32 load32(const u8* mem, const u32 addr){
-	return *(u32*)(mem + addr - trv_MEM_OFFSET);
+	return *(u32*)(mem + addr - tinyriscv_MEM_OFFSET);
 }
 
 static inline void store8(u8* mem, const u32 addr, const u8 val){
-	mem[addr - trv_MEM_OFFSET] = val;
+	mem[addr - tinyriscv_MEM_OFFSET] = val;
 }
 
 static inline void store16(u8* mem, const u32 addr, const u16 val){
-	*(u16*)(mem + addr - trv_MEM_OFFSET) = val;
+	*(u16*)(mem + addr - tinyriscv_MEM_OFFSET) = val;
 }
 
 static inline void store32(u8* mem, const u32 addr, const u32 val){
-	*(u32*)(mem + addr - trv_MEM_OFFSET) = val;
+	*(u32*)(mem + addr - tinyriscv_MEM_OFFSET) = val;
 }
 
-void trv_B_type(u32* pc, const u8 func3, const u32 regs[32], const u8 rs1, 
+void tinyriscv_b_type(u32* pc, const u8 func3, const u32 x[32], const u8 rs1, 
 	const u8 rs2, const i16 imm){
 
+	pc -= 4;
+
 	switch(func3){
-	case /*BEQ*/ 0x0: if(regs[rs1] == regs[rs2]) *pc += (i32)imm - 4; break;
-	case /*BNE*/ 0x1: if(regs[rs1] != regs[rs2]) *pc += (i32)imm - 4; break;
-	case /*BLT*/ 0x4: 
-		if((i32)regs[rs1] < (i32)regs[rs2]) *pc += (i32)imm - 4;
-		break;
-
-	case /*BGE*/ 0x5: 
-		if((i32)regs[rs1] >= (i32)regs[rs2]) *pc += (i32)imm - 4; 
-		break;
-
-	case /*BLTU*/ 0x6: if(regs[rs1] < regs[rs2]) *pc += (i32)imm - 4; break;
-	case /*BGEU*/ 0x7: if(regs[rs1] >= regs[rs2]) *pc += (i32)imm - 4; break;
+	case /*BEQ*/  0: if(x[rs1] == x[rs2]) *pc += (i32)imm; break; 
+	case /*BNE*/  1: if(x[rs1] != x[rs2]) *pc += (i32)imm; break;
+	case /*BLT*/  4: if((i32)x[rs1] < (i32)x[rs2]) *pc += (i32)imm; break; 
+	case /*BGE*/  5: if((i32)x[rs1] >= (i32)x[rs2]) *pc += (i32)imm; break;
+	case /*BLTU*/ 6: if(x[rs1] < x[rs2]) *pc += (i32)imm; break; 
+	case /*BGEU*/ 7: if(x[rs1] >= x[rs2]) *pc += (i32)imm; break;
 	}
 }
 
-void trv_L_type(const u8* mem, const u8 func3, u32 regs[32], const u8 rd, 
+void tinyriscv_l_type(const u8* mem, const u8 func3, u32 x[32], const u8 rd, 
 	const u8 rs1, const i16 imm){
 
-	const u32 addr = regs[rs1] + (i32)imm;
+	const u32 addr = x[rs1] + (i32)imm;
 
 	switch(func3){
-	case /*LB*/ 0x0: regs[rd] = (i32)(i8)load8(mem, addr); break;
-	case /*LH*/ 0x1: regs[rd] = (i32)(i16)load16(mem, addr); break;
-	case /*LW*/ 0x2: regs[rd] = load32(mem, addr); break;
-	case /*LBU*/ 0x4: regs[rd] = load8(mem, addr); break;
-	case /*LHU*/ 0x5: regs[rd] = load16(mem, addr); break;
+	case /*LB*/  0: x[rd] = (i32)(i8)load8(mem, addr); break;
+	case /*LH*/  1: x[rd] = (i32)(i16)load16(mem, addr); break;
+	case /*LW*/  2: x[rd] = load32(mem, addr); break;
+	case /*LBU*/ 4: x[rd] = load8(mem, addr); break;
+	case /*LHU*/ 5: x[rd] = load16(mem, addr); break;
 	}
 }
 
-void trv_S_type(u8* mem, const u8 func3, const u32 regs[32], const u8 rs1, 
+void tinyriscv_s_type(u8* mem, const u8 func3, const u32 x[32], const u8 rs1, 
 	const u8 rs2, const i16 imm){
 
-	const u32 addr = regs[rs1] + (i32)imm;
+	const u32 addr = x[rs1] + (i32)imm;
 
 	switch(func3){
-	case /*SB*/ 0x0: store8(mem, addr, regs[rs2]); break;
-	case /*SH*/ 0x1: store16(mem, addr, regs[rs2]); break;
-	case /*SW*/ 0x2: store32(mem, addr, regs[rs2]); break;
+	case /*SB*/ 0: store8(mem, addr, x[rs2]); break;
+	case /*SH*/ 1: store16(mem, addr, x[rs2]); break;
+	case /*SW*/ 2: store32(mem, addr, x[rs2]); break;
 	}
 }
 
-void trv_I_type(const u8 func3, const u8 func7, u32 regs[32], const u8 rd, 
-	const u8 rs1, const u8 rs2, const i16 imm){
+void tinyriscv_i_type(const u8 func3, const u8 func7, u32 x[32], const u8 rd, 
+	const u8 rs1, const i16 imm, const u8 shamt){
+
+	#define ADDI  (x[rd] = x[rs1] + (i32)imm)
+	#define SLTI  (x[rd] = (i32)x[rs1] < (i32)imm)
+	#define SLTIU (x[rd] = x[rs1] < (u32)(i32)imm)
+	#define XORI  (x[rd] = x[rs1] ^ (i32)imm)
+	#define ORI   (x[rd] = x[rs1] | (i32)imm)
+	#define ANDI  (x[rd] = x[rs1] & (i32)imm)
+	#define SLLI  (x[rd] = x[rs1] << shamt)
+	#define SRLI  (x[rd] = x[rs1] >> shamt)
+	#define SRAI  (x[rd] = (i32)x[rs1] >> shamt)
 
 	switch(func3){
-	case /*ADDI*/ 0x0: regs[rd] = regs[rs1] + (i32)imm; break;
-	case /*SLTI*/ 0x2: regs[rd] = (i32)regs[rs1] < (i32)imm; break;
-	case /*SLTIU*/ 0x3: regs[rd] = regs[rs1] < (u32)(i32)imm; break;
-	case /*XORI*/ 0x4: regs[rd] = regs[rs1] ^ (i32)imm; break;
-	case /*ORI*/ 0x6: regs[rd] = regs[rs1] | (i32)imm; break;
-	case /*ANDI*/ 0x7: regs[rd] = regs[rs1] & (i32)imm; break;
-	case /*SLLI*/ 0x1: regs[rd] = regs[rs1] << rs2; break;
-	case /*SRLI/SRAI*/ 0x5:
-		if(func7 == /*SRLI*/ 0x00) regs[rd] = regs[rs1] >> rs2;
-		else if(func7 == /*SRAI*/ 0x20) regs[rd] = (i32)regs[rs1] >> rs2;
-		break;
-	} 
+	case 0: ADDI; break; case 1: SLLI; break;
+	case 2: SLTI; break; case 3: SLTIU; break;
+	case 4: XORI; break;
+	case 5: func7 ? SRAI : SRLI; break;
+	case 6: ORI; break; case 7: ANDI; break;
+	}
 }
 
-void tinyriscv_R_type(const u8 func3, const u8 func7, u32 x[32], const u8 rd,
+void tinyriscv_r_type(const u8 func3, const u8 func7, u32 x[32], const u8 rd,
 	const u8 rs1, const u8 rs2){
 
 	#define ADD  (x[rd] = x[rs1] + x[rs2])
@@ -128,10 +128,10 @@ void tinyriscv_R_type(const u8 func3, const u8 func7, u32 x[32], const u8 rd,
 	}
 }
 
-void trv_step(trv_cpu* cpu){
+void tinyriscv_step(tinyriscv_hart* hart){
 	//fetch
-	const u32 inst = load32(cpu->mem, cpu->pc);
-	cpu->pc += 4;
+	const u32 inst = load32(hart->mem, hart->pc);
+	hart->pc += 4;
 
 	//decode
 	#define opcode (inst & 0x7f)
@@ -140,39 +140,39 @@ void trv_step(trv_cpu* cpu){
 	#define rd (inst >> 7 & 0x1f)
 	#define rs1 (inst >> 15 & 0x1f)
 	#define rs2 (inst >> 20 & 0x1f)
-	#define imm_I ((i32)inst >> 20)
-	#define imm_S (imm_I & 0xffffffe0 | rd)
+	#define imm_i ((i32)inst >> 20)
+	#define imm_s (imm_i & 0xffffffe0 | rd)
 
-	#define imm_B (((i32)(inst & 0x80000000) >> 19) | \
+	#define imm_b (((i32)(inst & 0x80000000) >> 19) | \
 		((inst & 0x80) << 4) | (inst >> 20 & 0x7e0) | (inst >> 7 & 0x1e))
 
-	#define imm_J (((i32)(inst & 0x80000000) >> 11) | (inst & 0xff000) | \
+	#define imm_j (((i32)(inst & 0x80000000) >> 11) | (inst & 0xff000) | \
         (inst >> 9 & 0x800) | (inst >> 20 & 0x7fe))
 
 	//execute
-	cpu->regs[0] = 0;
+	hart->x[0] = 0;
 
 	switch(opcode){
-	case /*LUI*/ 0x37: cpu->regs[rd] = inst & 0xfffff000; break;
-	case /*AUIPC*/ 0x17: cpu->regs[rd] = cpu->pc + (inst & 0xfffff000); break;
-	case /*JAL*/ 0x6f: cpu->regs[rd] = cpu->pc; cpu->pc += imm_J - 4; break;
-	case /*JALR*/ 0x67: 
-		const u32 last_pc = cpu->pc;
-		cpu->pc = (cpu->regs[rs1] + (i32)imm_I) & 0xfffffffe;
-		cpu->regs[rd] = last_pc;
+	case /*LUI*/   0x37: hart->x[rd] = inst & 0xfffff000; break;
+	case /*AUIPC*/ 0x17: hart->x[rd] = hart->pc + (inst & 0xfffff000); break;
+	case /*JAL*/   0x6f: hart->x[rd] = hart->pc; hart->pc += imm_j - 4; break;
+	case /*JALR*/  0x67: 
+		const u32 last_pc = hart->pc;
+		hart->pc = (hart->x[rs1] + (i32)imm_i) & 0xfffffffe;
+		hart->x[rd] = last_pc;
 		break;
 
-	case 0x63: trv_B_type(&cpu->pc, func3, cpu->regs, rs1, rs2, imm_B); break;
-	case 0x03: trv_L_type(cpu->mem, func3, cpu->regs, rd, rs1, imm_I); break;
-	case 0x23: trv_S_type(cpu->mem, func3, cpu->regs, rs1, rs2, imm_S); break;
-	case 0x13: trv_I_type(func3, func7, cpu->regs, rd, rs1, rs2, imm_I); break;
-	case 0x33: trv_R_type(func3, func7, cpu->regs, rd, rs1, rs2); break;
+	case 0x63: tinyriscv_b_type(&hart->pc, func3, hart->x, rs1, rs2, imm_b); break;
+	case 0x03: tinyriscv_l_type(hart->mem, func3, hart->x, rd, rs1, imm_i); break;
+	case 0x23: tinyriscv_s_type(hart->mem, func3, hart->x, rs1, rs2, imm_s); break;
+	case 0x13: tinyriscv_i_type(func3, func7, hart->x, rd, rs1, imm_i, rs2); break;
+	case 0x33: tinyriscv_r_type(func3, func7, hart->x, rd, rs1, rs2); break;
 	}
 }
 
-void trv_init(trv_cpu* cpu){
-	cpu->regs[2] = trv_MEM_OFFSET + cpu->mem_size;
-	cpu->pc = trv_MEM_OFFSET;
+void tinyriscv_init(tinyriscv_hart* hart){
+	hart->x[2] = tinyriscv_MEM_OFFSET + hart->mem_size;
+	hart->pc = tinyriscv_MEM_OFFSET;
 }
 
 #endif //TINYRISCV_H
\ No newline at end of file